In electronics, packaging of a number of integrated circuit chips in a single module is increasingly common in order to achieve minimization of the length of interconnection between components. Minimization of the length of interconnections improves the speed and performance of the circuitry. The main disadvantage of multi-chip modules, however, involves the cost of manufacturing such modules. Among the reasons for the high cost of multi-chip modules is the relatively low manufacturing yield of the modules. As the number of integrated circuit chips within a package increases, the likelihood of a defect within the package also increases. Detection of a defective chip within a module may result in the entire module having to be discarded.
Preferably, the individual integrated circuit chips are tested prior to interconnection within the multi-chip module. However, it is not uncommon for an operative chip to be rendered inoperative during the packaging of the chip. For example, a mismatch between the expansion coefficient of two materials used in joining the module to the chip will induce stresses in the bulk of the chip and its surface passivation, as well as the interconnection to the chip. Stress and strain will cause voids and lead to defective chips. Inoperative chips may also be a result of damage to an electrostatic discharge or damage during bonding wire connection.
Replacement of a defective component within a multi-chip module requires removal of both the electrical connection and the mechanical coupling of the component to a package. U.S. Pat. No. 4,901,136 to Neugebauer et al. teaches a multi-chip interconnection package. Electrical disconnection of a single chip may require the desoldering of hundreds of leads. Thus, it is often more cost-efficient to discard the entire package. U.S. Pat. No. 4,806,503 to Yoshida et al. teaches a method of replacing integrated circuit chips interconnected within a multi-chip module by tape automated bonding frames. In tape automated bonding, chips are attached to copper leads supported by a tape similar to 35-mm film. In manufacture of the frame the film is coated with copper, whereafter the leads are formed by lithography and etching techniques. The inner lead ends of the frame are connected to input/output pads of a chip. The outer lead ends are then microbonded to contacts on a substrate, such as a multi-chip module. The replacement method of Yoshida et al. is to cut the conductive traces of the tape automated bonding frame at the centers of the leads. That is, the outer lead bonds are left intact. A replacement part having a frame with leads sufficiently long to overlap the leads left from the first-installed frame is then precisely aligned to allow bonding of the replacement frame to the original leads.
Mechanical decoupling of the defective chip from the package is equally difficult. One method used for the original mechanical attachment of the chips is referred to as eutectic die bonding. This method metal-lurgically attaches the chip to the module. For example, a gold-silicon eutectic composition may be used. A drawback of this method is that the die bond site might not be suitable for replacement die attachment and the heat required to remove an original inoperative die may cause damage to packaged dies and components.
Polymer adhesive and silver glass die bonding are also utilized. The characteristics of materials such as silver glass provide a more void-free bonding method than metal counterparts. U.S. Pat. No. 4,872,047 to Fister et al. teaches a semiconductor die attach system using silver-glass adhesive. One drawback in the use of silver glass, however, is that the material is a thermosetting material which requires a high temperature and a long firing time. Fister et al. teaches use of a solder to dissipate the thermal stresses caused by strains generated during thermal cycling of a die and a substrate, thereby decreasing the susceptibility of the die to damage during attachment. A buffer formed of a thin strip of material capable of withstanding thermal stresses is provided between the chip and the substrate. Firstly, the solder is melted to bond the buffer to the substrate. Fister et al. teaches that the solder is relatively soft and deforms at a relatively low stress to accommodate the stress and strain generated by the mismatch in coefficients of expansion of the buffer and the substrate. Silver-glass adhesive is then deposited on the surface of the buffer and a chip is stacked on the adhesive. The adhesive is then melted and cooled to form the desired bond. Use of the Fister et al. method of attachment increases production yield, but cannot guarantee a yield of 100%. Thus, mechanical decoupling of a defective chip from a package is still a problem.
Mechanical decoupling of a defective chip from a multi-chip module requires melting of the bonding material. Because the silver glass requires a high and an extended melt time, it is difficult to localize heating for removal of the defective chip without affecting bonding of the other chips. Consequently, a previously good chip may be damaged as a neighboring defective chip is removed. Moreover, often there are governmental or industrial standards which are affected by an inability to localize the melting. This is particularly true in multi-chip modules manufactured for military applications. Thus, typically the entire module is discarded.
It is an object of the present invention to provide a method of manufacturing a multi-chip module which allows prepackaging testing of individual chips and wherein the resulting module can be easily reworked.